D9110MPLP Low Speed MIPI Protocol Trigger and Decode

D9110MPLP Low Speed MIPI Protocol Trigger and Decode

Data Sheets

D9110MPLP

Low Speed MIPI Protocol Trigger and Decode

for Infiniium Oscilloscopes

Introduction

The D9110MPLP software package for Infiniium oscilloscopes gives you the ability to trigger and decode RFEE, I3C, and SPMI low-speed MIPI signals. This package applies to all Infiniium Oscilloscopes.

Product Overview

Since MIPI protocols transfer bits serially, using a traditional oscilloscope has limitations. Manually converting captured 1’s and 0’s to protocol requires significant effort, cannot be done in short time, and includes potential for human error. In addition, traditional scope triggers are not sufficient for specifying protocollevel conditions.

Extend your oscilloscope capability with the Keysight D9110MPLP decode and trigger package. This application makes it easy to debug and test designs that include MIPI RFFE, I3C, and SPMI buses using your Infiniium series oscilloscope:

  • Set up your oscilloscope to show MIPI protocol decode in less than 30 seconds.
  • Get access to a rich set of integrated protocol-level triggers.
  • Save time and eliminate errors by viewing packets at the protocol level.
  • Use time-correlated views to quickly troubleshoot serial protocol problems back to their timing or signal integrity root cause.

The following are MIPI protocol decode features the application will support:

  • MIPI RFFE specification v1.10, v2.0 and v2.1 decode and trigger
  • MIPI I3C SDR, HDR-DDR, and I2C legacy standard, fast, and fast mode plus decode and trigger
  • MIPI SPMI v1.0 and v2.0 decode and trigger
  • Decodes traffic between multiple masters and slaves
  • Parity check on traffic to ensure data accuracy
  • Supports search capability for various frames, sequences and error

RFFE

The MIPI Alliance Specification for RF Front-End Control Interface (RFFE) was developed to offer a common and widespread method for controlling RF front-end devices. The interface can be applied to the full range of RF front-end components to simplify product design, configuration and integration, and to facilitate interoperability of components supplied by different vendors. The conveniences make it easier for manufacturers to address end-user needs for faster data speeds and better call quality, develop scalable solutions, and expedite time to market for new designs in the mobile, automotive and IoT sectors.

I3C

Improved Inter Integrated Circuit (I3C) is one of MIPI® (Mobile industry Processor Interface) standard aimed for next generation Sensor interface. This new interface improved upon the feature of I2C (inter Integrated Circuit) and provide backward compatibility with Legacy I2C devices. I3C is consist of 2 two bidirectional wires called SDA, SCL and optimized for multiple slave devices which controlled by one I3C master device at a time. I3C supports Higher speed than Legacy I2C which is 12.5 MHz and supporting several new high data rate (HDR) mode called as HDR-DDR (Double Data Rate), HDR-TSL (Ternary Symbol Legacy) and HDR-TSL (Ternary Symbol for Pure bus). D9110MPLP can also identify legacy I2C messages using address registration, so you can distinguish the communication between I3C and legacy I2C protocol data and find ACK or NACK errors based on address.

SPMI

System Power Management Interface (SPMI) is a MIPI (Mobile Industry Processor Interface) standard to managing power in mobile devices or other applications that appreciate it features. This interface can have up to 4 Masters and up to 16 Slaves in the one bus, so that multiple masters, like AP (Application Processor) or RFIC (Radio Frequency IC), or BBIC (Baseband IC) can control on or more power switches, PMIC (Power Management IC) or Protocol activated LDO regulators (Low Drop Out) with just 2 electrical lanes (SDATA and SCLK).

The biggest advantage of using this interface is that it is possible to control device status like Wakeup, Sleep, Reset, and Shutdown without sideband signal lanes. This helps engineers save space in compact form factor designs. Real time power related chip control provides more optimized power consumption on each of the SPMI interfaced chips. D9110MPLP also supports GSID (Group Slave identifier) so that if the system master supports GSID to send the same protocol command to several slaves, it will not show ACK/NACK error.