Increasing Throughput on the In-Circuit Test (ICT) System
Application Notes
Why does test time increase?
Firstly, know that longer test times can arise due to various reasons:
– The test generated from the Interactive Program Generator (IPG) may not be optimized for the specific production board revision
– Addition of test options when debugging tests the first time
– Addition of test options during production testing
– Incorrect interrupt analog test
– Incorrect power up
– Using default vector cycle to test digital devices
– Overly long wait during powered test
– Using “safeguard cool” command arbitrarily
– Overly complex test
– Immoderate wait in “testplan” file
– Incorrect GP-Relay usage
– Poorly maintained i3070 system hardware