Simulating the Effects of Layout Parasitics on a Power Inverter
Application Notes
With the development of semiconductor technology, the density of the devices on a chip has also grown. Due to this increase in density and reduction in space, parasitics has become more significant when designing the printed circuit board (PCB). These parasitics can be resistive, capacitive, or inductive. In this application note, we will discuss parasitic inductances and how to estimate their values using Keysight’s PathWave Power Electronics Professional (PEPro). PEPro is the next-generation EM-circuit co-simulation platform for Switched Model Power Supply (SMPS). This software can predict the values of the parasitic inductance on the layout.